Microchip Technology MCP16701 Power Management Integrated Circuit

Microchip Technology MCP16701 Power Management Integrated Circuit (PMIC) integrates eight DC-DC Buck regulators, four 300mA LDOs, and one LDO controller. This PMIC is compatible with Microchip's Embedded Microprocessor Units (eMPUs), which require Dynamic Voltage Scaling (DVS) using High-Performance mode (HPM). The MCP16701 PMIC is also compatible with PIC64GX, PolarFire, and PolarFireSoC. This PMIC features a low no-load operational quiescent current and draws less than 10μA in full shutdown. This PMIC also features a 3.4 MHz I²C interface, EEPROM Write Password Protection, and nINTO Pin (Interrupt Flag) with selectable interrupt masking for each channel. The MCP16701 PMIC is used in µC/µP, FPGA, DSP power, and high-performance MPUs power supply solutions.

Features

2.7V to 5.5V input voltage range
3.4MHz I²C Interface
Eight 1.5A buck DC-DC channels
Four 300mA high-accuracy LDOs
High-accuracy, high-PSRR LDO controller using external N-channel MOSFET (SERDES lanes supply)
±0.8% output voltage accuracy for bucks (V_DD), for V_FB ≥ 1V
-1.5%/+1% output voltage accuracy for the LDO controller, for V_FB ≥ 0.9V
±1% output voltage accuracy for LDOs, for V_FB ≥ 1.8V
Tight R_DS(ON) matching of parallel channels for good current sharing
Programmable output voltage for all buck and LDO channels, 0.6V to 3.8V (No external feedback resistors required)
100% duty cycle capability of buck channels
LDO controller output voltage 0.6V to 1.6V/12.5mV steps
Reference Ground (REFGND) can be remotely routed to the load ground (Pseudo remote sensing)
Low-noise forced-PWM and light-load high-efficiency mode available (Pin-selectable or bit control)

External synchronization of switching frequency, with accurate switching event time positioning
Selectable phase (0°, 90°, 180°, or 270°) for buck channels
Global RESET (nRSTO_A) with programmable deassertion delay
User-defined RESET (nRSTO_P) with programmable deassertion delay (Ideal for PolarFire FPGA DEVRST_N interfacing)
Dedicated V_DD supply pin for EEPROM and interface allows programming without powering up the application
On-board embedded EEPROM for default power-up configuration programming
EEPROM write password protection
Reconfigurable during runtime
Hiccup-mode current limit for buck channels (can be disabled)
Programmable thermal early warning and thermal shutdown protection
nINTO pin (Interrupt Flag) with selectable interrupt masking for each channel
Available in 64-pin VQFN package, 8mm x 8mm